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Hardware description language
Results: 134

#	Item
51	Property Specification Language Reference Manual Version 1.1 June 9, 2004 Add to Reading List Source URL: www.eda-stds.org Language: English - Date: 2004-06-29 00:18:58 Formal methods Hardware verification languages Property Specification Language Accellera Technical communication Verilog Specification Functional verification Functional specification Electronic design automation Electronic engineering Hardware description languages
52	NEC R S ERAR E SCEHAR E RC H I NETRE’ S Add to Reading List Source URL: www.nec.com Language: English - Date: 2013-10-21 08:30:36 Integrated circuits Logic design Logic synthesis Integrated circuit design Application-specific integrated circuit Hardware description language High-level synthesis CPU design Field-programmable gate array Electronic engineering Electronic design automation Electronic design
53	MDEP Generic Common Position Multinational Design Evaluation Programme Generic Common Position DICWG No5 – PUBLIC USE Add to Reading List Source URL: www.oecd-nea.org Language: English - Date: 2013-06-12 04:30:53 Systems engineering Software engineering Electronic design Hardware description language Technical communication Field-programmable gate array Software development process VHDL Application-specific integrated circuit Electronic engineering Digital electronics Logic design
54	Automated Hardware Synthesis from Formal Specification using SAT solvers. David Greaves - Univ of Cambridge∗ / Tenison EDA 1 Input Design Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2004-04-15 12:29:23 Field-programmable gate array Logic synthesis Verilog Hardware description language High-level synthesis Solver Decoder Electronic engineering Electronic design automation Digital electronics
55	SNPS[removed]10-K Add to Reading List Source URL: synopsys.com Language: English - Date: 2014-12-15 13:24:22 Integrated circuits Hardware verification languages Synopsys Hardware description language Electronic system-level design and verification Signoff Logic synthesis Integrated circuit design SystemVerilog Electronic engineering Electronic design automation Electronic design
56	Paper formatting guidelines for FPL 2005 proceedings Add to Reading List Source URL: www.automatedtrader.net Language: English - Date: 2008-04-02 15:55:41 Field-programmable gate array Monte Carlo methods in finance Parallel computing Logic simulation Monte Carlo method Accelerator Simulation Hardware description language Digital electronics Electronic engineering Logic design
57	ECE3056 - Architecture, Concurrency, and Energy in Computation[removed]Prerequisites: ECE 2031/20X2 [min C] and ECE[removed]min C] Corequisites: None Catalog Description: Basic organizational principles of the major c Add to Reading List Source URL: pe.gatech.edu Language: English - Date: 2014-12-19 12:26:28 Computer engineering Microprocessors Computer memory Firmware Microcode Hardware description language Microarchitecture Parallel computing Memory hierarchy Computer architecture Computer hardware Central processing unit
58	THE NATIONAL COUNCIL OF EXAMINERS FOR ENGINEERING AND SURVEYING Add to Reading List Source URL: fmjfn28v7he3vmrnjjqunw53.wpengine.netdna-cdn.com Language: English - Date: 2014-12-15 15:51:12 Application software Operating system Computer architecture Device driver Computer engineering Hardware description language Principles and Practice of Engineering Exam Computer Software Electronic engineering Digital electronics Technology
59	SNPS[removed]10-K Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-24 17:15:56 Integrated circuits Hardware verification languages Synopsys Hardware description language Electronic system-level design and verification Signoff Logic synthesis Integrated circuit design SystemVerilog Electronic engineering Electronic design automation Electronic design
60	Saber Aerospace Overview Proven Robust Design Solution for Aerospace Mechatronic Systems Saber ® is the proven standard for mechatronic system design and verification. Aerospace design teams worldwide use Saber to devel Add to Reading List Source URL: www.synopsys.com Language: English VHDL-AMS Synopsys Reliability engineering VHDL SystemC SPICE Verilog Aerospace engineering Modeling language Electronic engineering Hardware description languages Electronic design automation